WIRE name E1
WIRE name E2
WIRE name E3_D1
WIRE name E4
WIRE name E5_D2
WIRE name E6_D3
WIRE name E7_D4
WIRE name Fetch
WIRE name Store
WIRE name M1
WIRE name M2
WIRE name M3
WIRE name M4
WIRE name M5
WIRE name M6
WIRE name M7
WIRE name C1
WIRE name C2
WIRE name C3
WIRE name C4
WIRE name preM10
WIRE name preM20
WIRE name preM30
WIRE name preM40
WIRE name preM50
WIRE name preM60
WIRE name preM70
WIRE name preC10
WIRE name preC20
WIRE name preC30
WIRE name preC40
WIRE name preM11
WIRE name preM21
WIRE name preM31
WIRE name preM41
WIRE name preM51
WIRE name preM61
WIRE name preM71
WIRE name preC11
WIRE name preC21
WIRE name preC31
WIRE name preC41

WIRE name preFetch0
WIRE name preFetch1
WIRE name preStore0
WIRE name preStore1

WIRE name Da
WIRE name Clock
WIRE name E3_D1not
WIRE name Clocknot
WIRE name a1
WIRE name b1
WIRE name c1
WIRE name d1
WIRE name e1
WIRE name f1

WIRE name Db
WIRE name Clock
WIRE name E5_D2not
WIRE name Clocknot
WIRE name a2
WIRE name b2
WIRE name c2
WIRE name d2
WIRE name e2
WIRE name f2

WIRE name Dc
WIRE name Clock
WIRE name E6_D3not
WIRE name Clocknot
WIRE name a3
WIRE name b3
WIRE name c3
WIRE name d3
WIRE name e3
WIRE name f3

WIRE name Dd
WIRE name Clock
WIRE name E7_D4not
WIRE name Clocknot
WIRE name a4
WIRE name b4
WIRE name c4
WIRE name d4
WIRE name e4
WIRE name f4

WIRE name Errora
WIRE name M1M3
WIRE name M5M7

WIRE name Errorb
WIRE name M2M3
WIRE name M6M7a

WIRE name Errorc
WIRE name Errorcnot
WIRE name M4M5
WIRE name M6M7b

WIRE name Panotw
WIRE name Pbnotw
WIRE name OrPsw
WIRE name And1w
WIRE name And2w
WIRE name And3aw
WIRE name Dinnotw
WIRE name Pnegnotw
WIRE name Doutw

WIRE name Panotx
WIRE name Pbnotx
WIRE name OrPsx
WIRE name And1x
WIRE name And2x
WIRE name And3ax
WIRE name Dinnotx
WIRE name Pnegnotx
WIRE name Doutx

WIRE name Panoty
WIRE name Pbnoty
WIRE name OrPsy
WIRE name And1y
WIRE name And2y
WIRE name And3ay
WIRE name Dinnoty
WIRE name Pnegnoty
WIRE name Douty

WIRE name Panotz
WIRE name Pbnotz
WIRE name OrPsz
WIRE name And1z
WIRE name And2z
WIRE name And3az
WIRE name Dinnotz
WIRE name Pnegnotz
WIRE name Doutz

WIRE name FetchDoutw
WIRE name FetchDoutx
WIRE name FetchDouty
WIRE name FetchDoutz

WIRE name StoreC1
WIRE name StoreC2
WIRE name StoreC3
WIRE name StoreC4

BATTERY high (preM11 preM21 preM31 preM41 preM51 preM61 preM71 preC11 preC21 preC31 preC41) low (preM10 preM20 preM30 preM40 preM50 preM60 preM70 preC10 preC20 preC30 preC40)
SPDTSWITCH name M1 connect0 preM10 connect1 preM11 common M1
SPDTSWITCH name M2 connect0 preM20 connect1 preM21 common M2
SPDTSWITCH name M3 connect0 preM30 connect1 preM31 common M3
SPDTSWITCH name M4 connect0 preM40 connect1 preM41 common M4
SPDTSWITCH name M5 connect0 preM50 connect1 preM51 common M5
SPDTSWITCH name M6 connect0 preM60 connect1 preM61 common M6
SPDTSWITCH name M7 connect0 preM70 connect1 preM71 common M7
SPDTSWITCH name C1 connect0 preC10 connect1 preC11 common C1
SPDTSWITCH name C2 connect0 preC20 connect1 preC21 common C2
SPDTSWITCH name C3 connect0 preC30 connect1 preC31 common C3
SPDTSWITCH name C4 connect0 preC40 connect1 preC41 common C4

XORGATE input1 M1 input2 M3 output M1M3
XORGATE input1 M5 input2 M7 output M5M7
XORGATE input1 M1M3 input2 M5M7 output Errora

XORGATE input1 M2 input2 M3 output M2M3
XORGATE input1 M6 input2 M7 output M6M7a
XORGATE input1 M2M3 input2 M6M7a output Errorb

XORGATE input1 M4 input2 M5 output M4M5
XORGATE input1 M6 input2 M7 output M6M7b
XORGATE input1 M4M5 input2 M6M7b output Errorc

NOTGATE input Errorc output Errorcnot

NOTGATE input Errora output Panotw
NOTGATE input Errorb output Pbnotw
NOTGATE input M3 output Dinnotw
NOTGATE input Errorc output Pnegnotw
OR3GATE input1 Panotw input2 Pbnotw input3 Errorc output OrPsw
AND3GATE input1 Pnegnotw input2 Errora input3 Errorb output And3aw
ANDGATE input1 OrPsw input2 M3 output And1w
ANDGATE input1 Dinnotw input2 And3aw output And2w
ORGATE input1 And1w input2 And2w output Doutw

NOTGATE input Errora output Panotx
NOTGATE input Errorc output Pbnotx
NOTGATE input M5 output Dinnotx
NOTGATE input Errorb output Pnegnotx
OR3GATE input1 Panotx input2 Pbnotx input3 Errorb output OrPsx
AND3GATE input1 Pnegnotx input2 Errora input3 Errorc output And3ax
ANDGATE input1 OrPsx input2 M5 output And1x
ANDGATE input1 Dinnotx input2 And3ax output And2x
ORGATE input1 And1x input2 And2x output Doutx

NOTGATE input Errorb output Panoty
NOTGATE input Errorc output Pbnoty
NOTGATE input M6 output Dinnoty
NOTGATE input Errora output Pnegnoty
OR3GATE input1 Panoty input2 Pbnoty input3 Errora output OrPsy
AND3GATE input1 Pnegnoty input2 Errorb input3 Errorc output And3ay
ANDGATE input1 OrPsy input2 M6 output And1y
ANDGATE input1 Dinnoty input2 And3ay output And2y
ORGATE input1 And1y input2 And2y output Douty

NOTGATE input Errora output Panotz
NOTGATE input Errorb output Pbnotz
NOTGATE input M7 output Dinnotz
NOTGATE input Errorcnot output Pnegnotz
OR3GATE input1 Panotz input2 Pbnotz input3 Errorcnot output OrPsz
AND3GATE input1 Pnegnotz input2 Errora input3 Errorb output And3az
ANDGATE input1 OrPsz input2 M7 output And1z
ANDGATE input1 Dinnotz input2 And3az output And2z
ORGATE input1 And1z input2 And2z output Doutz

BATTERY high (preStore1 preFetch1) low (preStore0 preFetch0)
SPDTSWITCH name Fetch connect0 preFetch0 connect1 preFetch1 common Fetch
SPDTSWITCH name Store connect0 preStore0 connect1 preStore1 common Store
ORGATE input1 Store input2 Fetch output Clock

ANDGATE input1 Doutw input2 Fetch output FetchDoutw
ANDGATE input1 Doutx input2 Fetch output FetchDoutx
ANDGATE input1 Douty input2 Fetch output FetchDouty
ANDGATE input1 Doutz input2 Fetch output FetchDoutz

ANDGATE input1 C1 input2 Store output StoreC1
ANDGATE input1 C2 input2 Store output StoreC2
ANDGATE input1 C3 input2 Store output StoreC3
ANDGATE input1 C4 input2 Store output StoreC4

ORGATE input1 FetchDoutw input2 StoreC1 output Da
ORGATE input1 FetchDoutx input2 StoreC2 output Db
ORGATE input1 FetchDouty input2 StoreC3 output Dc
ORGATE input1 FetchDoutz input2 StoreC4 output Dd

NOTGATE input Clock output Clocknot
NANDGATE input1 Da input2 Clock output a1
NANDGATE input1 Clock input2 a1 output b1
NANDGATE input1 a1 input2 d1 output c1
NANDGATE input1 c1 input2 b1 output d1
NANDGATE input1 c1 input2 Clocknot output e1
NANDGATE input1 d1 input2 Clocknot output f1
NANDGATE input1 e1 input2 E3_D1not output E3_D1
NANDGATE input1 f1 input2 E3_D1 output E3_D1not

NOTGATE input Clock output Clocknot
NANDGATE input1 Db input2 Clock output a2
NANDGATE input1 Clock input2 a2 output b2
NANDGATE input1 a2 input2 d2 output c2
NANDGATE input1 c2 input2 b2 output d2
NANDGATE input1 c2 input2 Clocknot output e2
NANDGATE input1 d2 input2 Clocknot output f2
NANDGATE input1 e2 input2 E5_D2not output E5_D2
NANDGATE input1 f2 input2 E5_D2 output E5_D2not

NOTGATE input Clock output Clocknot
NANDGATE input1 Dc input2 Clock output a3
NANDGATE input1 Clock input2 a3 output b3
NANDGATE input1 a3 input2 d3 output c3
NANDGATE input1 c3 input2 b3 output d3
NANDGATE input1 c3 input2 Clocknot output e3
NANDGATE input1 d3 input2 Clocknot output f3
NANDGATE input1 e3 input2 E6_D3not output E6_D3
NANDGATE input1 f3 input2 E6_D3 output E6_D3not

NOTGATE input Clock output Clocknot
NANDGATE input1 Dd input2 Clock output a4
NANDGATE input1 Clock input2 a4 output b4
NANDGATE input1 a4 input2 d4 output c4
NANDGATE input1 c4 input2 b4 output d4
NANDGATE input1 c4 input2 Clocknot output e4
NANDGATE input1 d4 input2 Clocknot output f4
NANDGATE input1 e4 input2 E7_D4not output E7_D4
NANDGATE input1 f4 input2 E7_D4 output E7_D4not

XOR3GATE input1 E3_D1 input2 E5_D2 input3 E7_D4 output E1
XOR3GATE input1 E3_D1 input2 E6_D3 input3 E7_D4 output E2
XOR3GATE input1 E5_D2 input2 E6_D3 input3 E7_D4 output E4